1) edge triggered interruption
边沿触发中断
1.
SPI interface could process data-exchange between host pro-cessor and slave processor in the rising edge and descending edge of eight clock pulse through Neurowire object de-clared in Neuron-chip and SPI operation simulat ed in AT89S51 by an edge triggered interruption.
为增强LonWorks节点控制能力,采用单片机作为LonWorks节点的主处理器,Neuron芯片作为从处理器;主从处理器采用SPI通信接口;SPI接口利用Neuron芯片中声明的Neurowire对象和AT89S51单片机中用软件模拟SPI操作,以边沿触发中断的方式在8个时钟脉冲的上升沿和下降沿完成主从处理器的数据传递。
2) edge-triggered flip-flop
边沿触发
1.
Three triggered ways of the flip-flop which are master-slave flip-flop,pulse flip-flop,edge-triggered flip-flop,is analyzed and compared in the paper.
分析与比较了触发器三种触发方式:电平触发、脉冲触发、边沿触发。
3) interrupt,edge-triggered
边缘触发中断
4) Double edge trigger
双边沿触发
1.
Design of low power Flip-Flop based on double edge trigger;
基于双边沿触发的低功耗触发器逻辑设计
5) double-edge-triggered flip-flop
双边沿触发器
1.
Design of low power multivalued double-edge-triggered flip-flop;
多值低功耗双边沿触发器设计
2.
The application of this type of double-edge-triggered flip-flop in seq.
从双边沿触发器的特点出发,提出了一种双边沿动态触发器的设计方案,该触发器结构较其他几种设计方案简单。
6) Single-edge-triggered Flip-flop
单边沿触发器
1.
Design of Double-edge-triggered Time Sequence Circuit Based on Single-edge-triggered Flip-flop;
基于单边沿触发器的双边沿时序电路设计
补充资料：边沿
边缘①：～地带。
说明：补充资料仅用于学习参考，请勿用于其它任何用途。
参考词条