1.
Designing for High Precision Synchronous Clock Based on GPS-Clock
基于GPS秒时钟的高精度同步时钟设计
2.
Implementation and Design of Infrared-based Intelligent Clock;
基于红外遥控的智能时钟设计与实现
3.
The Design Process and Emulation based on AT89C51 Digital Time Unit
基于AT89C51数字时钟设计过程与仿真
4.
Designing a Font-Changeable Topmost Clock in Delphi
利用Delphi设计字体可变的浮动计时时钟
5.
SDH Equipment Clock Design and Realization Based FPGA;
基于FPGA的SDH设备时钟的设计与实现
6.
Design of Digital Phase Locked Loop Used in SDH Equipment Clock
SDH设备时钟中的数字锁相环设计
7.
Analysis of the Clock Skew in ASIC Design
专用集成电路设计中的时钟偏移分析
8.
Design of Phase-locked Loop for USB2.0 Application;
应用于USB2.0时钟数据恢复的锁相环设计
9.
The Research of Clock Tree Synthesis Methods Based on Chip Design Garfield5;
基于Garfield5设计中时钟树综合技术研究
10.
The Design of a Phase-Locked Loop Used in a DSP Clock System;
一种用于DSP时钟系统的锁相环的设计
11.
Design and Analysis of CMOS PLL Clock Generator;
CMOS锁相环时钟发生器的设计与研究
12.
Design of Clock Network Based on DLL in FPGA;
FPGA中基于DLL的时钟网络的设计
13.
The Design of 1GHz Clock Circuit with FPGA;
基于FPGA的1GHz时钟电路设计
14.
The Design of P89LPC935 Actuation Numerical Code Tube Demonstrate the Clock;
P89LPC935驱动数码管显示时钟的设计
15.
Discussion on Clock s Reliability in Designing PLD or FPCA;
在PLD／FPCA设计中有关时钟的可靠性探讨
16.
Design and Implementation of a High Precision Clock in UNIX SVR4.0;
NIXSVR4.0高精度时钟的设计与实现
17.
Design of 2.5GHz Full Speed Clock and Data Recovery Circuit
2.5GHz全速率时钟数据恢复电路的设计
18.
Design of Clock Generation and Drive Circuits in High Speed CIS System
高速CIS时钟发生电路及驱动电路设计