1.
Property Generation Method for Model Checking on Clock Domain Crossing Design
面向模型检验的跨时钟域设计电路特性生成方法
2.
Designing for High Precision Synchronous Clock Based on GPS-Clock
基于GPS秒时钟的高精度同步时钟设计
3.
Designing a Font-Changeable Topmost Clock in Delphi
利用Delphi设计字体可变的浮动计时时钟
4.
The Design and Implementation of a Model to Support Cross-Domain Synchronized Resource Allocation;
跨域资源同步分配模型的设计与实现
5.
Design of Cross-domain Single Sign-on System Based on Cookie
基于Cookie的跨域单点登录系统的设计
6.
SDH Equipment Clock Design and Realization Based FPGA;
基于FPGA的SDH设备时钟的设计与实现
7.
Design of Digital Phase Locked Loop Used in SDH Equipment Clock
SDH设备时钟中的数字锁相环设计
8.
Analysis of the Clock Skew in ASIC Design
专用集成电路设计中的时钟偏移分析
9.
Design of Phase-locked Loop for USB2.0 Application;
应用于USB2.0时钟数据恢复的锁相环设计
10.
The Research of Clock Tree Synthesis Methods Based on Chip Design Garfield5;
基于Garfield5设计中时钟树综合技术研究
11.
The Design of a Phase-Locked Loop Used in a DSP Clock System;
一种用于DSP时钟系统的锁相环的设计
12.
Design and Analysis of CMOS PLL Clock Generator;
CMOS锁相环时钟发生器的设计与研究
13.
Design of Clock Network Based on DLL in FPGA;
FPGA中基于DLL的时钟网络的设计
14.
The Design of 1GHz Clock Circuit with FPGA;
基于FPGA的1GHz时钟电路设计
15.
Implementation and Design of Infrared-based Intelligent Clock;
基于红外遥控的智能时钟设计与实现
16.
The Design of P89LPC935 Actuation Numerical Code Tube Demonstrate the Clock;
P89LPC935驱动数码管显示时钟的设计
17.
Discussion on Clock s Reliability in Designing PLD or FPCA;
在PLD／FPCA设计中有关时钟的可靠性探讨
18.
Design and Implementation of a High Precision Clock in UNIX SVR4.0;
NIXSVR4.0高精度时钟的设计与实现