1.
The Research and Implementation on DDR2 Memory Controller with High Bandwidth and Low Latency;
高带宽低延时的DDR2内存控制器的研究与实现
2.
Modules Design and Verification Technology Research of DDR2 SDRAM Controller
DDR2内存控制器的模块设计和验证平台技术研究
3.
Design and FPGA Implementation of DDR2 Controller IP
DDR2控制器IP的设计与FPGA实现
4.
Design of SDRAM Controller Applied to DDR and DDR2 Architecture
适用于DDR SDRAM和DDR2 SDRAM的控制器的设计
5.
Design and Verification of DDR2 SDRAM Controller
DDR2 SDRAM控制器的设计与验证
6.
A Master-slave Delay-locked Loop Structure for DDR2 Controller
基于DDR2控制器的主从结构DLL的研究与设计
7.
DMAC Direct Memory Access Controller
直接内存存取控制器
8.
Design of DDR2 Controller with the Cache of Reducing Writing Delay of DRAM Based on FPGA
基于FPGA实现的带有减小DRAM写延迟的Cache的DDR2控制器的设计
9.
MIOC: Memory and I/O Bridge Controller
内存和i/o桥控制器
10.
DDR2 SDRAM Memory Interface Based on Spartan-3 FPGA;
基于Spartan-3 FPGA的DDR2 SDRAM存储器接口设计
11.
A RAM Circuit for the Robot Controller
一种机器人控制器简便公用内存电路
12.
Design of FPGA-Based Fault Injection Tool for DDR2 SDRAM UDIMM
基于FPGA的DDR2 SDRAM UDIMM内存故障注入工具的设计
13.
Collection of server control and server memory change events.
服务器控制和服务器内存更改事件集合。
14.
overlay access control register
覆盖存取控制寄存器
15.
controller bus address register
控制器总线地址寄存器
16.
control register
控制寄存器, 程序计数器
17.
Memory mapping LCD controller design research based on SOPC technology
基于SOPC技术的内存映射型LCD控制器设计研究
18.
From the point of view of the device, say the floppy disk controller, it will see only the address space that its control registers are in (ISA), and not the system memory.
从设备的角度来看，比如说软盘控制器，它只能看到在ISA总线上的控制寄存器而不是系统内存。